8051 based microcontrollers typically include one or two UARTs, two or three timers, 128 or 256 bytes of internal data RAM (16 bytes of which are bit-addressable), up to 128 bytes of I/O, 512 bytes to 64 kB of internal program memory, and sometimes a quantity of extended data RAM (ERAM) located in the external data space. The original 8051 core ran at 12 clock cycles per machine cycle, with most instructions executing in one or two machine cycles. With a 12 MHz clock frequency, the 8051 could thus execute 1 million one-cycle instructions per second or 500,000 two-cycle instructions per second. Enhanced 8051 cores are now commonly used which run at six, four, two, or even one clock per machine cycle, and have clock frequencies of up to 100 MHz, and are thus capable of an even greater number of instructions per second. All SILabs, some Dallas and a few Atmel devices have single cycle cores.

Even higher speed single cycle 8051 cores, in the range 130 MHz to 150 MHz, are now available in internet downloadable form for use in programmable logic devices such as FPGAs, and at many hundreds of MHz in ASICs, for example the netlist from www.e8051.com.
Common features included in modern 8051 based microcontrollers include built-in reset timers with brown-out detection, on-chip oscillators, self-programmable Flash ROM program memory, bootloader code in ROM, EEPROM non-volatile data storage, I²C, SPI, and USB host interfaces, PWM generators, analog comparators, A/D and D/A converters, RTCs, extra counters and timers, in-circuit debugging facilities, more interrupt sources, and extra power saving modes.

Many microcontrollers are so quirky that they effectively require their own non-standard dialects of C, such as SDCC for the 8051, which prevent using standard tools (such as code libraries or static analysis tools) even for code unrelated to hardware features. Interpreters are often used to hide such low level quirks.
Interpreter firmware is also available for some microcontrollers. For example, BASIC on the early microcontrollers Intel 8052[4]; BASIC and FORTH on the Zilog Z8[5] as well as some modern devices. Typically these interpreters support interactive programming.
Simulators are available for some microcontrollers, such as in Microchip’s MPLAB environment. These allow a developer to analyse what the behaviour of the microcontroller and their program should be if they were using the actual part. A simulator will show the internal processor state and also that of the outputs, as well as allowing input signals to be generated. While on the one hand most simulators will be limited from being unable to simulate much other hardware in a system, they can exercise conditions that may otherwise be hard to reproduce at will in the physical implementation, and can be the quickest way to debug and analyse problems.
Recent microcontrollers are often integrated with on-chip debug circuitry that when accessed by an In-circuit emulator via JTAG, allow debugging of the firmware with a debugger

* MSP430 (16-bit)
* CF (32-bit)
* ARM
* MIPS (32-bit PIC32)
* S08
* AVR
* PIC (8-bit PIC16, PIC18, 16-bit dsPIC33 / PIC24)
* V850
* PowerPC ISE
* PSoC (Programmable System-on-Chip)
* Basic Stamp

Most microcontrollers at this time had two variants. One had an erasable EEPROM program memory, which was significantly more expensive than the PROM variant which was only programmable once.
In 1993, the introduction of EEPROM memory allowed microcontrollers (beginning with the Microchip PIC16x84) [1][citation needed]) to be electrically erased quickly without an expensive package as required for EPROM, allowing both rapid prototyping, and In System Programming.
The same year, Atmel introduced the first microcontroller using Flash memory. [6].

Other companies rapidly followed suit, with both memory types.

Cost has plummeted over time, with the cheapest microcontrollers being available for well under $0.25 in 2009 , and 32 bit microcontrollers under $5.
Nowadays microcontrollers are low cost and readily available for hobbyists, with large online communities around certain processors.

Prior to 1984, it was not necessarily illegal to produce a competing chip with an identical layout. As the legislative history for the Semiconductor Chip Protection Act of 1984, or SCPA, explained, patent and copyright protection for chip layouts, or topographies, were largely unavailable. This led to considerable complaint by U.S. chip manufacturers–notably, Intel, which took the lead in seeking legislation, along with the Semiconductor Industry Association (SIA)–against what they termed “chip piracy.”
A 1984 addition to US law, the SCPA, made all so-called mask works (i.e., chip topographies) protectable if registered with the U.S. Copyright Office. Similar rules apply in most other countries that manufacture ICs. (This is a simplified explanation – see SCPA for legal details.)